Resources: Code

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jCall is a framework for simplifying the access to Julia code from fully compiled languages like C, C++ or Fortran. Accessing Julia code from such a language is a bit tedious, since most non-primitive types (such as, e.g., Vectors) do not map easily from and to C. Rather, one has to create structures that mirror a Julia type and deserialize C data from/to them. All of this has to be done in wrapper functions or structures and carried out recursively.

In order to facilitate this process, we created jCall: From a list of function signatures, jCall automatically generates wrapper functions and de/serialization. Pointers for complex return values are allocated outside of Julia’s garbage collection using Libc.

Resources: Code

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This package is an attempt to reproduce NVIDIA’s CUDA Runtime API, i.e. enable the user to write device kernels and launch them in a quasi-grid structure on NEC’s Aurora SX-TSUBASA vector engine.

To that end, we wrap NEC’s VE Offload and UDMA APIs such that the usage mimics CUDA’s runtime API.

Resources: Code Artifact

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Large sparse symmetric indefinite matrices are notoriously hard to precondition. They often lack diagonal dominance and exhibit Schur-complements that render zero fill-in preconditioning ineffective. Pivoting, a necessity for stable LDLt factorizations, complicates parallel approaches that can take advantage of the latest massively-parallel HPC hardware such as GPUs. We present an approach based on ad-hoc blocking and reordering strategies that allows local, independent collective-oriented processing of small dense blocks. A hybrid block-memory layout compensates for irregular memory access patterns found in sparse matrices. Our method allows restricted fill-in, supernodal pivoting and a dual threshold dropping strategy at little additional cost. It delivers robust preconditioners that in our experiments obtain an average speedup of ~ 6x even for tough matrices from optimization problems.

Our implementation supports:

• iLDLt factorization for sparse matrices with an additional block-layer
• full pivoting inside each block (-row)
• area-based fill heuristic
• hybrid block storage
• parallelization on GPUs using CUDA
• templated code for float/double precision factorization and solve
• a parralel SQMR-implementation for solving indefinite systems using the iLDLt preconditioner

Apart from the code, we offer the corresponding artifact from IA3 including all data and a driver script for replicating our experiments. As part of the IA3 reviewing process, our code and the artifact has been reviewed and experiments have been replicated.

Resources: Code

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CPU-implementation of out massively-parallel, generic, MRF MAP solver named mapMAP posing minimal assumptions to the input, allowing rapid solution of a large class of MRF problems.

mapMAP’s algorithmic foundation and parallelization concept has been presented at High Performance Graphics 2016 in Dublin, Ireland. Currently, we support the following features:

• Customizable (parallel) performance
  • Change cost type between float and double
  • Templated SIMD width (1, 4, 8 for float; 1, 2, 4 for double)
  • Automatically setting SIMD width at compile time
  • Supports SSE4/AVX/AVX2, autodetected during build
  • Automatically using linear-time optimization for certain submodular cost functions
  • Novel linear-time optimization for certain supermodular cost functions
  • Two algorithms for parallel tree sampling
• Extensible interfaces for all components, providing user hooks
  • Cost functions (unary and pairwise)
  • Termination criteria
  • Node grouping criteria for the multilevel module
  • Choice of two (parallel) coordinate selection algorithms
  • Use of heuristics, thereby modifying the solver’s structure.
  • User hooks for logging intermediate results.
• Solver modules
  • Acyclic (BCD) descent
  • Spanning tree descent
  • Multilevel solving
• Finding and exploiting connected components in the topology
• Test suite for each individual module

This implementation is currently in productive use in Nils Moehrle’s mvs-texturing.